Inside Intel's Chip Factory, I Saw the Future. It's Plain Old Glass - CNET

Computer processors are immoderate of the astir analyzable devices humans ever created. Engineers pluck conscionable the close combinations of atoms retired of the periodic array to marque materials that tin steer cascades of electrons done billions of finely etched circuits astatine ultrahigh speeds.

But the adjacent breakthrough to marque our laptops much businesslike and AI much almighty could travel from plain aged glass. I've conscionable seen firsthand however it works.

Intel volition item the solid exertion astatine its Innovation event Tuesday successful San Jose, California. I was 1 of conscionable 2 journalists who got the archetypal look astatine however this exertion works, donning a stuffy head-to-toe "bunny suit" to participate Intel's ultraclean CH8 mill successful Chandler, Arizona. There, successful a hulking achromatic high-tech gathering successful the Phoenix area's scorching godforsaken landscape, Intel transforms sheets of solid the size of a tiny tabletop into paperclip-sized rectangular sandwiches of circuitry built with immoderate of the aforesaid techniques arsenic the processor itself.

Intel has begun a years-long modulation to caller exertion that rests processors connected a furniture of solid alternatively of today's epoxy-like integrated resin. The caller solid foundation, called a substrate, offers the speed, powerfulness and existent property indispensable for the spot industry's displacement to caller exertion packaging aggregate "chiplets" into a azygous larger processor.

In short, that means a caller mode to prolong Moore's Law, which charts advancement successful cramming much circuitry elements called transistors into a processor. The A17 Pro processor successful Apple's iPhone 15 Pro has 19 cardinal transistors. Intel's Ponte Vecchio supercomputing processor has much than 100 billion. By the extremity of the decade, Intel expects processors with -- if you tin ideate it -- a trillion transistors.

Intel relied connected this chiplet attack to drawback up to competitors with superior processor manufacturing abilities. But present Intel tin usage it to outpace rivals successful an epoch erstwhile exploding request for caller processing powerfulness has surpassed the industry's quality to present it, said Creative Strategies expert Ben Bajarin. And Intel's solid substrate exertion demonstrates Intel's packaging prowess.

"One 100 percent, this is going to extremity up starring to a competitory advantage," Bajarin said.

What it means for you, a fewer years down the line, is supercharged laptops and AI tools that are adjacent much stunningly astute than what you're seeing today. 

Why the spot manufacture volition displacement to solid substrates

The full spot manufacture volition marque the solid modulation astatine slightest for high-end processors to header with chipmaking challenges, and Intel has the lead, said FeibusTech expert Mike Feibus.

With much than a decade's enactment collaborating with academics and investigating caller methods, a unit of 600 headquartered astatine Chandler has turned probe and improvement into a functioning manufacturing line.

"Basically, the innovation is done," said Ann Kelleher, the enforcement vice president starring exertion improvement astatine Intel. The solid substrate exertion "gives america an quality to yet get higher show for our products."

Those are bold words from a institution that's halfway done a four-year effort to retrieve the prowess it mislaid to Taiwan Semiconductor Manufacturing Co. (TSMC) and Samsung, spot "foundries" that physique processors for hundreds of electronics companies. When Intel manufacturing advancement stalled for respective years starting astir a decennary ago, it mislaid its erstwhile formidable pb to the 2 Asian chipmakers.

The solid exertion underneath a processor won't get until the 2nd fractional of the decade, and erstwhile it does, it'll look archetypal underneath the biggest, astir power-hungry chips, the ones that perch successful thousands of servers stacked up successful information centers operated by immense "hyperscalers" similar Google, Amazon, Microsoft and Meta.

That's due to the fact that solid brings respective advantages to these blistery and immense chips, said Rahul Manepalli, an Intel chap who leads Intel's module engineering work.

It tin accommodate 10 times the powerfulness and information connections arsenic today's integrated substrates truthful much information tin beryllium pumped successful and retired of a chip. It doesn't warp arsenic much, captious to ensuring processors prevarication level and link decently to the extracurricular satellite and frankincense enabling 50% larger spot packages. It transmits powerfulness with little waste, meaning chips tin tally either faster oregon much efficiently. And it tin tally astatine a higher temperature, and erstwhile it heats up, it expands astatine the aforesaid complaint arsenic silicon to debar mechanical failures.

Glass volition alteration a caller procreation of server and information halfway processors, successors to mammoth beasts similar the Intel Xeons that tin tally unreality computing services similar email and online banking and Nvidia's artificial quality processors that person exploded successful popularity arsenic the satellite embraces generative AI.

But arsenic solid substrates mature and costs travel down, it'll dispersed beyond information centers to the machine sitting connected your lap.

The wrong of CH8, an Intel installation successful the Phoenix suburb of Chandler, Arizona, is packed with instrumentality for manufacturing the substrates that prevarication beneath processors and different packaging technology. It's wherever Intel developed its EMIB exertion successful past years and is moving connected solid substrates today.

Stephen Shankland/CNET

"Clearly we spot this going into lawsuit applications," Manepalli said, utilizing Intel's word for idiosyncratic computers.

Chipmaking recovery: Five nodes successful 4 years

Under the enactment of Chief Executive Pat Gelsinger, who rejoined Intel successful 2021, Intel is trying to claw its mode backmost to the starring edge. At each property league and quarterly net call, Intel executives intone the mantra "five nodes successful 4 years," referring to the effort to beforehand done 5 large caller spot manufacturing steps astatine a torrid gait to drawback up to TSMC and Samsung and past surpass them by 2025.

Kelleher, successful complaint of the effort, declares 2 of the steps implicit truthful acold and the remainder proceeding connected schedule. In a briefing I attended astatine Intel's Chandler facilities, with galore of her apical executives gathered astir a league table, the no-nonsense Irish electrical technologist makes it wide you don't privation to beryllium the idiosyncratic to disappoint her.

"For those who cognize maine well, and this squad whitethorn chuckle, I don't similar missing a milestone," she said. The executives bash so chuckle, but their somewhat tense code makes it wide it's acold from a joking matter.

"5N4Y," arsenic the betterment effort is called, is simply a difficult, costly and ambitious betterment program for a institution that fell truthful acold behind. So far, Gelsinger, Kelleher and thousands of engineers are delivering the goods.

"With each passing year, I person a higher grade of assurance that they volition deed those milestones," Bajarin said.

A bundle deal

But adjacent if Intel recovers its pb successful the manufacturing process called lithography that etches transistors onto a silicon surface, the institution and its rivals each look a superior problem: gathering the lodging that attaches those chips to a circuit board. That's wherever packaging and solid substrates travel into the picture.

Intel's 8086 chip, the 1978 precursor to each PC and server processor that Intel has made since, was a level quadrate of silicon with 29,000 transistors. To support it and plug it into a circuit board, it was housed successful a bundle that looked similar a level caterpillar. Forty metallic legs carried powerfulness and information to the chip.

The Intel 8086 processor bundle had 40 electrical connections for powerfulness and information that gave the spot a caterpillar look. Modern chips person thousands of connections, present conscionable tiny metallic patches connected the underside of the package.

Intel

Since then, processor packaging has precocious dramatically. It erstwhile was comparatively crude, but present the bound betwixt chipmaking and packaging are blurring, Kelleher said. Packaging processes present usage lithography machines to etch their ain circuitry, though not astir arsenic finely arsenic connected processors. 

Over the decades, processors moved from caterpillar legs to hundreds of pins that looked similar a tiny furniture of nails covering the bottommost of a processor. (If you ever built a PC backmost successful the day, slotting a processor into its socket, you'll cognize what I'm talking about.) But yet that attack didn't connection capable electrical contacts to the circuit board, either.

So today's packages person level metallic interaction patches connected the bottommost of the package. The spot is installed erstwhile hundreds of pounds of unit mash it onto a circuit board.

A metallic headdress atop a processor draws distant discarded vigor that different would clang a computer. And beneath the processor is simply a substrate with an progressively complex, three-dimensional web of powerfulness and information connections to nexus the spot to the extracurricular world.

What lies beneath

There are challenges moving from today's integrated substrates to glass. Glass is brittle, truthful it indispensable beryllium handled carefully, for example.

To easiness the transition, Intel is adapting glass-handling instrumentality from experts who already cognize however to grip it without breaking: the show industry, which makes everything from tiny smartwatch screens to tremendous flat-panel TVs. They besides person to etch circuitry onto solid and person developed galore of the needed ultrapure materials and cautious handling processes.

But determination are differences. Flat-panel displays person delicate physics elements lone connected 1 side, truthful solid tin glide done factories connected rollers. Intel builds a sandwich of materials and circuitry called redistribution layers onto some sides of the glass, truthful its machines indispensable successful effect clasp the solid lone by the edges.

In 1 measurement of the process I saw successful Intel's CH8 facility, a sealed instrumentality with a stack of astir quadrate solid substrates plugs into the beforehand of a agleam achromatic instrumentality astir the size of a double-decker bus. Each sheet is cautiously withdrawn from the container, pulled into the machine, pivoted into a vertical predisposition and slurped deeper wrong for caller layers to beryllium added to the sandwich.

As with everything successful Intel, it's designed for high-volume manufacturing, not low-scale R&D projects.

"I walked distant with a greater appreciation of not conscionable the exertion but besides Intel's capabilities to bash precocious packaging," said Bajarin, 1 of the 2 journalists and 3 analysts who toured CH8. "It made maine a batch much optimistic astir their prospects."

Packaging boosts Intel Foundry Services

Intel packaging exertion should beryllium utile for its ain information halfway processors. It besides is important for Intel's ambitious concern overhaul to go a spot "foundry" similar TSMC and Samsung, gathering processors for different companies done its Intel Foundry Services division.

Packaging is simply a work Intel tin supply adjacent if it makes nary of the chips and chiplets that spell into a package. But past it tin pb to a deeper lawsuit woody successful which intel fabrication facilities, oregon "fabs," physique the silicon processor chips and chiplets, too.

"We person some competitiveness and capacity," said Mark Gardner, the elder manager who leads the Foundry Advanced Packaging radical astatine IFS. Signing connected a packaging lawsuit is simply a spot easier than signing connected a chipmaking customer, with less exertion complications and shorter pb times, helium said.

A real-world illustration of Intel's packaging exertion is Intel's Sapphire Rapids, a ample Xeon processor for information centers. Intel combines 4 CPU tiles, each besides called a dice oregon chiplet, into 1 larger processor. Intel's EMIB (embedded multidie interconnect bridge), a bladed sliver of silicon underneath the edges wherever the tiles abut, proviso information links crossed the processor truthful it behaves similar 1 larger unit.

Stephen Shankland/CNET

But successful lawsuit deals for packaging tin pb to the deeper narration that extends into chipmaking, successful peculiar with the Intel 18A chipmaking process the institution expects volition surpass TSMC and Samsung successful 2024.

"It's a ft successful the door," Gardner said. "There's 1 lawsuit successful peculiar [for which] that trajectory of packaging archetypal and precocious packaging past 18A is moving well."

The powerfulness of packaging

Packaging is cardinal to the Intel of today. Its newest Sapphire Rapids subordinate of the Xeon server processor enactment uses a exertion called EMIB (embedded multidie interconnect bridge) to nexus 4 chiplets into 1 ample processor. A smaller chiplet (each besides called a die) is little apt than a ample 1 to beryllium spoiled by a manufacturing defect, truthful manufacturing yields improve.

At Tuesday's Innovation event, Intel volition radiance a spotlight connected Meteor Lake, its next-generation Core processor for PCs. It employs a antithetic processor packaging technique called Foveros that stacks chiplets successful 3 dimensions similar pancakes -- and successful Meteor Lake's case, astir of the chiplets are Intel designs really manufactured by its apical rival, TSMC. Meteor Lake is expected to get successful PCs aboriginal this year.

With those 2 products, on with much exotic processors similar Ponte Vecchio, Intel has moved the bulk of its processor products to chiplet designs. In 2024, Intel plans to present much chiplet-based designs, including the large Granite Rapids and bigger Sierra Forest Xeon chips and the Arrow Lake PC chips expected successful 2024.

Intel is the biggest instrumentality of assembling "disaggregated" slices of silicon into bigger processors, but others person embraced it, too.

The M2 Ultra, the top-end Mac processor that completed Apple's two-year modulation distant from Intel chips, joins 2 M2 Max chips with a high-speed connection. And AMD, which relies connected TSMC and Samsung to physique its designs, has gained marketplace stock astatine Intel's disbursal with server chips that employment aggregate chiplets.

It's unclear however overmuch of the processor concern volition determination from "monolithic," single-die designs to chiplet designs. There are inactive outgo and simplicity advantages to avoiding precocious packaging. But it's wide the biggest processors -- the server and AI brains successful information centers -- volition go sprawling complexes of interlinked chiplets.

And that's wherever solid substrates should travel successful handy, with capable area, connection links and powerfulness transportation abilities to springiness spot designers country for growth.

"You commencement to deed your caput connected a technology," Feibus said, "and it's clip to find a caller mode to bash things."